The present invention relates to an image forming apparatus which generates image information of, e.g., an electrostatic latent image on an image holding surface of a photosensitive body, electrostatic transfer medium or the like, by introducing optically-modulated laser light from a laser light source, and more particularly, to a clock control apparatus and method and an image forming apparatus using the apparatus preferably applicable to a color image forming apparatus having plural drums for outputting overlapped plural color images.
Conventionally, in color image forming apparatuses having plural drums, as a print sheet is conveyed from one of the drums to the next, a positional shift for each color occurs in a main-scanning direction, perpendicular to a paper conveyance direction, which causes color unevenness. To correct such positional shift in the main-scanning direction (hereinafter, simply referred to as xe2x80x9cpositional correctionxe2x80x9d), a construction to perform positional correction by 1/n pixel (n is an integer) in the main-scanning direction for each color is used.
Hereinafter, a main-scanning direction synchronization control technique related to general positional correction will be described with reference to FIGS. 7 to 12.
In FIG. 7, reference numeral 601 denotes a main-scanning synchronization detection circuit; 602, an original clock generation circuit; 603, a main-scanning synchronizing clock generation unit which inputs a main-scanning synchronizing signal S601 outputted from the main-scanning synchronization detection circuit 601 and an original clock S602 outputted from the original clock generation circuit 602 and outputs a pixel clock S603 synchronized with the main-scanning synchronizing signal S601; 604, a delay unit which delays the pixel clock S603 outputted from the main-scanning synchronizing clock generation unit 603 by a delay amount (delay by 1/n pixel) in accordance with a positional correction amount designation signal S606 designated from a CPU (not shown); 605, a PWM generation unit which generates a PWM signal corresponding to a pixel density from a delayed pixel clock S604 outputted from the delay unit 604, image data S607 and a pixel density designation signal S608 inputted from an image processor (not shown); and 606, a laser driving unit which drives a laser 607 in accordance with the PWM signal S605 outputted from the PWM generation unit 605.
The delay unit 604 has a circuit construction as shown in FIG. 8. In this example, the pixel delay amount is xc2xc pixel. In this figure, numerals 610 to 612 denote delay devices each having a delay amount equal to xc2xc of the duration of the pixel clock 5503. Numeral 613 denotes a selector which inputs four clocks respectively shifted by xc2xc clock, i.e., the pixel clock S603, a clock S610 obtained by the delay device 610 by delaying the pixel clock S603 by xc2xc, a clock S511 obtained by the delay device 611 by delaying the clock S510 by xc2xc, and a clock S512 obtained by the delay device 612 by delaying the clock S611 by xc2xc, and selects one of the input clocks in accordance with the positional correction amount designation signal S606 from the CPU (not shown) and outputs the selected clock as the delayed pixel clock S604.
In the timing chart of FIG. 9A, the clocks S603 and S604 have the signal waveforms shown, in a case where the delay devices 610 to 612 are ideal delay devices. Further, the delayed pixel clock S604 in FIG. 9A has the signal waveform shown in a case where a C input of the selector is selected in accordance with the positional correction amount designation signal S606 from the CPU.
FIG. 10 shows an example of circuit construction of the PWM generation unit 605 which inputs the delayed pixel clock S604 outputted from the delay unit 604.
In FIG. 10, numeral 620 denotes a D/A converter which D/A-converts the image data S607 inputted from the image processor (not shown); 621, a triangular wave generator comprising an integrator and the like, which is driven by the delayed pixel clock S604, and which generates a triangular wave in synchronization with the delayed pixel clock S604; and 624, a comparator which compares an analog signal S620 corresponding to the image data outputted from the D/A converter 620 with a triangular wave S621 outputted from the triangular wave generator 621. The triangular wave generator 621 and the comparator 624 together constitute a high-density PWM generator P1.
Further, in FIG. 10, numeral 622 denotes a divider which {fraction (3/2)}-divides the pixel clock S604 (i.e., divides the clock by {fraction (3/2)}). The divider 622 has a circuit construction as shown in FIG. 11. FIG. 12A is a timing chart of respective signals in FIG. 11. The construction and operation of the divider 622 will be described with reference to FIGS. 11 and 12A. A double clock S631, which is double of the pixel clock S604, is generated by exclusive OR logic operation by a logic element 630 between the input delayed pixel clock S604 and a clock S630 obtained by the delay device 610 by delaying the pixel clock S604 by xc2xc. Then, the double clock S631 is ⅓ divided by the ⅓-divider 631, into a {fraction (3/2)} clock S622.
Returning to FIG. 10, numeral 623 denotes a triangular wave generator comprising an integrator or the like, which is driven by the {fraction (3/2)} clock S622 outputted from the {fraction (3/2)}-divider 622, and which generates a triangular wave in synchronization with the {fraction (3/2)} clock S622. Numeral 625 denotes a comparator which compares the analog signal S620 corresponding to the image data outputted from the D/A converter 620 with the triangular wave S623 outputted from the triangular wave generator 623. The divider 622, the triangular wave generator 623 and the comparator 625 together constitute a low-density PWM generator P2.
Numeral 626 denotes a selector which inputs PWM waveforms S624 and S625 of different periods outputted from the comparator 624 in the high-density PWM generator P1 and the comparator 625 in the low-density PWM generator P2, selects one of the waveforms in accordance with the pixel density designation signal S608 from the image processor (not shown), and outputs the selected waveform as the PWM signal S605.
In a color copying machine, the circuit as described above is provided respectively for yellow, magenta, cyan and black colors. A CPU (not shown) calculates a relative shift amount in the main-scanning direction for each color, and inputs a positional correction amount into the delay unit 604 for each color, thereby correcting the shift by 1/n pixel in the main-scanning direction for each color.
However, as the delay devices 610 to 612 used for positional correction are not ideal devices, the actual delay amount at the rising edge and that at the falling edge of pixel clock outputted from the delay device are somewhat different. Consequently, the duty of the clock inputted into the PWM generation unit 605 at the next stage is not 50%. For this reason, in the conventional art, the PWM signal cannot be uniform depending on printing pixel density, and in such case, image quality is seriously degraded. This problem will be described with reference to FIGS. 9B, 12B and 13. Note that in the following description, the PWM signal is nonuniform when the printing pixel density is low ({fraction (3/2)} frequency division).
As described above, if the delay devices 610 to 612 are ideal devices, delay is effected by an amount of xc2xc pixel at the rising edge and the same at the falling edge, as shown in FIG. 9A. In the figure, the letter T denotes one period of the pixel clock S603; and xc2xcT, xc2xc period of one pixel.
However, actually, at the rising edge, delay occurs in an amount xcex1 in addition to xc2xc pixel period, and at the falling edge, the delay amount is augmented by an amount xcex2 in addition to xc2xc pixel period (generally, the relation xcex1 greater than xcex2 holds). Accordingly, the pixel clock S603 is delayed as a clock S610xe2x80x2 by the delay device 610. Similarly, it is delayed as clocks S611xe2x80x2 and S612xe2x80x2 by the delay devices 611 and 612.
Accordingly, if the C input of the selector 613 is selected by the positional correction amount designation signal S606 from the CPU (not shown), a clock S604xe2x80x2 where a Hi period is shorter by 2xc3x97(xcex1xe2x88x92xcex2),is inputted into the PWM generation unit 605 at the next stage. This means that the pixel clock duty changes in correspondence with the positional correction amount. For example, if an input D of the selector 613 corresponding to a xc2xe-pixel delay is selected, the Hi period of the clock is shorter by 3xc3x97(xcex1xe2x88x92xcex2).
In a case where the clock S604xe2x80x2 where the duty is a little reduced is inputted into the PWM generation unit 605, in the high-density PWM generator P1 in FIG. 10, the PWM signal S605 with approximately uniform width as shown in FIG. 13 can be obtained. However, in the low-density PWM generator P2 in FIG. 10, as the double clock is generated by further delaying the clock S604xe2x80x2 with a slightly reduced duty by the delay device 610, an accurate double clock S631 cannot be generated, and instead a clock S631xe2x80x2 with different shift positions is obtained. If a {fraction (3/2)} clock of pixel clock is generated by ⅓-dividing the clock S631xe2x80x2 a clock S622xe2x80x2 having alternate short and long periods is obtained, and as shown in FIG. 13, the PWM signal S605 has alternate short and long periods. The unevenness of the PWM signal using low-density PWM causes pitch unevenness in reproduction of uniform image data, thus degrading image quality.
The present invention has been made in consideration of the above conventional problem, and has as its object to enable generation of uniform PWM signal regardless of recording pixel density and to enable high-quality image formation.
According to one aspect of the present invention, the foregoing object is attained by providing a control apparatus for controlling a clock for drawing drive in an image forming apparatus, comprising a first synchronizing clock generation unit that generates a first synchronizing clock synchronized with a main-scanning synchronizing signal based on the main-scanning synchronizing signal and an original clock, a delay unit that generates a delayed clock by delaying the first synchronizing clock in accordance with a designated correction amount, a pseudo-synchronizing signal generation unit that generates a pseudo-synchronizing signal based on the delayed clock and a second synchronizing clock generation unit that generates a second synchronizing clock synchronized with the pseudo-synchronizing signal based on the pseudo-synchronizing signal and the original clock.
In accordance with this aspect of the present invention, as described above, a pseudo-synchronizing signal is generated from the main-scanning synchronizing signal in accordance with the correction amount, and the second synchronizing clock is obtained in synchronization with the pseudo-synchronizing signal. Thus, the duty ratio of the timing-corrected pixel clock (second synchronizing clock) can be maintained the same as that of the original clock.
Further, according to another aspect of the present invention, the foregoing object is attained by providing a control method for controlling a clock for drawing drive in an image forming apparatus, comprising the steps of generating a first synchronizing clock synchronized with a main-scanning synchronizing signal based on the main-scanning synchronizing signal and an original clock, generating a delayed clock by delaying the first synchronizing clock in accordance with a designated correction amount, generating a pseudo-synchronizing signal based on the delayed clock, and generating a second synchronizing clock synchronized with the pseudo-synchronizing signal based on the pseudo-synchronizing signal and the original clock.
Further, according to another aspect of the present invention, an image forming apparatus using the above clock control apparatus can be provided.
Other features and advantages of the present invention will be apparent from the following description taken in conjunction with the accompanying drawings, in which like reference characters designate the same name or similar parts throughout the figures thereof.